Hardware implementation of the Otsu's method applied to realtime worm segmentation

Abstract

Behavioral genomic studies employing the worm Caenorhabditis elegans have aided the discovery of new gene-behavioral associations and the screening of new drugs. Highresolution cameras record experiments with this worm, generating videos that computational solutions will later process for automated behavioral analysis. Because of the large volume of data to be processed, these analyses usually have to be performed offline. However, it is desired to develop a high-throughput implementation capable of operating in real-time, seeking to reduce the memory occupation by storing videos and allow the realization of new kinds of experiments. One way to speed up the algorithms employed is through the use of reconfigurable computing. Therefore, this work proposes the hardware development of the Otsu method for worm segmentation in real-time. The proposed implementation was developed in Field Programmable Gate Array (FPGA) using a fully parallel strategy with fixed-point representation. Architecture details are presented, as well as synthesis results related to the hardware area occupation, throughput, and dynamic power consumption. Results about validation of the implementation using images of the worms are also provided. The data show that the proposed architecture can achieve high speedups compared to similar work presented in the literature, besides allowing the segmentation of worms in real-time.